CU
Configuration
This compute unit implements the GCN 2 architecture. It consists of 4 blocks, each containing the following execution units.
| Data type | Execution rate |
| FP32 | 16 lanes, executing one operation per cycle |
|---|---|
| INT32 | 16 lanes, executing one operation per cycle |
| FP64 | 8 lanes, executing one operation per cycle |
Block diagram
ALU
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